The increasing complexity of electronic systems has led not only to the use of semiconductor chips with increasing scales of integration, but also of chip carriers with smaller bond pad geometries, closer bond pad pitches, and higher net (interconnections) counts. Furthermore, as electronic circuits become faster and signal timings become more crucial, lower tolerances are now affordable for deviations in electrical properties, such as resistance, inductance, and capacitance, of carriers. As a result, it has become increasingly more difficult to attain high yield in the production of both chips and chip carriers. Compounding the problem is the growing cost of rework that is caused by the increasing scale of integration and the common use of multi-chip carriers.
For the above stated reasons, it has become economically important in the manufacturing of semiconductor devices not only to test the chips, but also the chip carriers prior to assembling them together to form a device.
However, as semiconductor devices operate faster and propagation speed of signals through the carriers becomes more crucial, prior art instruments that merely test for continuity and/or capacitance of signal paths are no longer deemed satisfactory.
Digital transmission lines in the carriers have traditionally been electrically tested by measuring continuity, capacitance, inductance, and impedance. In addition, discontinuities in the transmission line have been tested using time domain reflectometry. Each of these tests is a functional test in which the signal paths of the circuit under test are tested by providing signals to the transmission lines and analyzing the resulting signals from the transmission line. In particular, the signal at the opposite end of the transmission line is verified so that the transmitted signal is readable by an input of an integrated circuit (IC). For digital signals, this requires that the edges of (and correspondingly the rise and fall times) and the amplitude of a signal pulse do not degrade while propagating through the carrier, so that when the transmitted signal pulse is provided to the IC, the IC recognizes the pulse as a proper signal and responds accordingly. Thus, a simple functional test is desired to replace these highly complex electrical tests.
In addition to the difficulties of testing the inductance, capacitance, resistance, and impedance of the signal paths at high frequencies, such as 10 GHz, this testing provides only a partial determination of whether the functional substrate operates as desired.
It is an object of the invention to run a simple test such as a computer program that generates simultaneous switching and transmission of signals along parallel paths to detect such failures as ground bounces and cross talk on a bad carrier.
It is an object of the invention to provide a test of the substrate that adequately simulates the operational environment of the carrier to properly determine whether the carrier sufficiently degrades the electrical signals as they pass through the carrier so that the degraded electrical signals do not activate the input portion of the next integrated circuit in the circuit chain. It is a further object of the invention to provide a test method that eliminates the need for determining the electrical parameters described above and which greatly simplifies the test equipment.
What is needed for increasing the yield of manufacturing semiconductor devices is a test technique and apparatus that can simulate the operating environment of the carriers.